The column output circuit is realized by double sample and hold circuit which can effectively decrease fpn ( fixed pattern noise ) 列輸出電路采用雙采樣電路,該電路能有效地消除固定模式噪聲。
The system , based on 89c51 , has two stages of sampling and holding circuits , which can discriminates positive - going edge and negative - going edge of signals , providing signal peak information 如果以橫坐標(biāo)為信號(hào)道址、縱坐標(biāo)為道址對(duì)應(yīng)的計(jì)數(shù)率,可以得到一條核輻射譜線。
The sample and hold circuit is employed by the bottom plate sampling technique , which could not only cancel the charge injection error but also eliminate the effect of clock feed - through 采樣保持電路設(shè)計(jì)采用了電容下極板采樣技術(shù),不僅有效地避免了電荷注入效應(yīng)引起的采樣信號(hào)失真,而且消除了時(shí)鐘饋通效應(yīng)的不良影響。